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u/testaccount789@sh.itjust.works
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Sorry, don't have an answer for iPhones, but if someone has similar issue originating from Android device, RethinkDNS app logs could be useful: https://f-droid.org/packages/com.celzero.bravedns/

One interesting app I have right now when it comes to network crap is NetMonster. I blocked its network access, but it keeps making roughly 2.3 DNS requests per second. That's almost 6 million DNS requests per month.
Oh, and when I used NextDNS blockpage, it kept making connections to it, wasting network bandwidth. But that option also revealed to me that many apps which show ads ignore TLS certificates, and just display what gets fed to them.

Also happened in Slovakia.

One I had recently heard of happened in ÄŚachtice in 2023.
48 year old ex police officer was cleaning a rifle, when it fired, shooting through a window, and killing a 30 year old mother who was in a kitchen of opposing building 120m (394ft) away.
Less than a month ago he received a 2 year prison sentence suspended for 3 years, and a ban on owning and using firearms for 8 years.

Used sources (in Slovak):
MarkĂ­za's report from 2023
RTVS conviction report from 2026

But you can still run both at once. RP2350 datasheet

From section 3.9 Arm/RISC-V architecture switching:

There are two processor sockets on RP2350, referred to as core 0 and core 1 throughout this document. Each socket can be occupied either by a Cortex-M33 processor (implementing the Armv8-M Main architecture, plus extensions) or by a Hazard3 processor (implementing the RV32IMAC architecture, plus extensions).

From section 3.9.2. Mixed architecture combinations:

The ARCHSEL register has one bit for each processor socket, so it is possible to request mixed combinations of Arm and RISC-V processors: either Arm core 0 and RISC-V core 1, or RISC-V core 0 and Arm core 1.

Practical applications for this are limited, since this requires two separate program images. The two cores interoperate normally, including shared exclusives via the global monitor: a shared variable can be safely, concurrently accessed by an Arm processor performing ldrex, strex instructions and a RISC-V processor performing amoadd.w instructions, for example